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TDA7463A
LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO PROCESSOR
1

FEATURES
2 STEREO INPUT 1 STEREO OUTPUT TREBLE BOOST BASS CONTROL BASS AUTOMATIC LEVEL CONTROL VOLUME CONTROL IN 1dB STEPS MUTE STAND-BY FUNCTION SOFTWARE CONTROLLED ALL FUNCTION ARE PROGRAMMABLE VIA SERIAL BUS
Figure 1. Package
SO20
Table 1. Order Codes
Part Number TDA7463A Package SO20
2
DESCRIPTION
The TDA7463A is a volume tone (bass and treble) processor for quality audio applications in Low voltage supply portable systems. Bass ALC (Automatic Level Control) function can Figure 2. Application & Test Circuit
R5 5.6K C14 3.3nF 100nF C13
be adjusted by a dedicated pin. The control of all the functions is accomplished by serial bus. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. Thanks to the used BIPOLAR/CMOS Technology, Low Distortion, Low Noise and DC stepping are obtained.
100nF C12
TREBLE-R 17 C1 0.47F IN2-R 18 INPUT SELECT -63dB CONTROL TREBLE
BASSI-R 16
BASSO-R 15
RB
50K C2 0.47F IN1-R 19
0/-10dB x1 BASS x5 14 OUT-R
50K I2C 1 10 HALF_WAVE RECTIFIER + I2C BUS DECODER + LATCHES 9 SDA SCL R3 1K R4 1K 2 3 4 VS DGND SCL SDA
VS BASS_ALC CONTROL C3 0.47F ALC R1 1M 20
VS
C4 0.47F IN1-L
2 TREBLE 50K -63dB CONTROL BASS 0/-10dB
x5 x1 7
OUT-L
C5 0.47F IN2-L
3
50K 4 D99AU1049 C6 3.3nF 5 TREBLE-L
RB 6 BASSI-L C7 100nF
VREF 11 BASSO-L
SUPPLY 12 GND CREF C9 22F
VS 1 C10 100nF
VS C11 100F
C8 100nF R2 5.6K
June 2004
REV. 4 1/12
TDA7463A
Table 2. Absolute Maximum Ratings
Symbol VS Tamb Tstg Operating Supply Voltage Operating Ambient Temperature Storage Temperature Range Parameter Value 5 0 to 70 -55 to 150 Unit V C C
Figure 3. Pin Connection
VS IN1-L IN2-L TREBLE-L BASSI-L BASSO-L OUT-L N.C. SDA SCL
1 2 3 4 5 6 7 8 9 10
D99AU1050
20 19 18 17 16 15 14 13 12 11
ALC IN1-R IN2-R TREBLE-R BASSI-R BASSO-R OUT-R N.C. CREF GND
Table 3. Thermal Data
Symbol Rth j-pin Parameter Thermal Resistance Junction-pins Value 85 Unit C/W
Table 4. Quick Reference Data
Symbol VS VCL THD S/N Sc Parameter Supply voltage Max. input signal handling Total Harmonic Distortion Signal to Noise Ratio Channel Separation Volume control V = 0.1Vrms ; f = 1KHz Vout = 0.1Vrms (mode = OFF f = 1KHz (1dB step) -10dB damping -14dB Treble Control Bass Control mute attenuation -63 -10 0 0 0 100 80 80 0 0 14 8 14 8 Test Condition Min. 1.8 0.2 0.1 Typ. 2.4 Max. 3 Unit V Vrms % dB dB dB dB dB dB dB dB
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Table 5. Electrical Characteristcs (refer to the test circuit Tamb = 25C, VS =2.4V, R L= 10K, RG = 600, all controls flat, unless otherwise specified)
Symbol SUPPLY VS IS IST-BY SVR Supply Voltage Supply Current Stand-By Current Ripple Rejection 1.8 2.4 4 50 70 3 V mA A dB Parameter Test Condition Min. Typ. Max. Unit
INPUT STAGE RIN VCL Input Resistance Clipping Level THD = 0.3% 35 0.2 50 65 K Vrms
VOLUME CONTROL CRANGE AV MIN AVMAX ASTEP Amute A-10dB G14dB Control Range Min Attenuation Max. Attenuation Step Resolution Mute Attenuation -10dB damping 14dB gain 80 -1 62 63 0 63 1 100 10 14 1 64 dB dB dB dB dB dB dB
BASS CONTROL (1) Gb RB Control Range Internal Feedback Resistance Max. Boost/on 33.75 14 45 56.25 dB K
TREBLE CONTROL (1) Gt Control Range Max. Boost on 8 dB
AUDIO OUTPUTS VCLIP RL VDC GENERAL
E
Clipping Level Output Load Resistance DC Voltage Level
d = 0.3%
0.2 10 0.8
VRMS K V V V 1 dB dB dB 0.1 %
NO
Output Noise
Outout Muted All gains = 0dB; BW = 20Hz to 20KHz flat
5 8 0
E
t
Total Tracking Error Signal to Noise Ratio Channel Separation Left/Right Distortion AV = 0; VI = 0.1VRMS ; All gains 0dB; VO = 0.1VRMS;
S/N SC d BUS INPUT VIL VIH IIN VO
80 80
Input Low Voltage Input High Voltage Input Current Output Voltage SDA Acknowledge VIN = 0.4V IO = 1.6mA 1.9 -5
0.5
V V A V
5 0.4
Note: 1. BASS and TREBLE response: The center frequency and the response quality can be chosen by the external circuitry.
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3
DATA BYTES
Address = (HEX) 10001000 Table 6. FUNCTION SELECTION: The first byte (subaddress)58
MSB D7 D6 X X X
B = 1 incremental bus; active B = 0 no incremental bus; X = indifferent 0,1
LSB SUBADDRESS D5 X X X D4 B B B D3 0 0 0 D2 0 0 0 D1 0 0 1 D0 0 1 0 STAND-BY & TREBLE & OTHERS BASS VOLUME
Table 7. STAND_BY & TREBLE & OTHERS
MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 STAND-BY 1 ALL CIRCUITS STOP TREBLE 1 1 0 1 0 0 0 0 0 0 0 STAND-BY (Treble block stops) BOOST OFF BOOST ON High Boost (+8dB) Low Boost (+4dB) MUTE 1 0 1 0 Input Mute ON Input Mute OFF Output Mute ON Output Mute OFF BASS 1 0 Release Current Circuit ON Release Current Circuit OFF INPUT Select 1 0 INPUT 1 INPUT 2
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Table 8. BASS
MSB D7 D6 D5 D4 D3 D2 D1 1 0 1 0 1 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 0 LSB D0 1 BASS STAND-BY (Bass block stops) BASS (boost OFF) BASS (boost ON) High boost (Ex. + 14dB) Low boost (Ex. + 6dB) ALC mode OFF (ALC block stops) ALC mode ON Attack time resistor (12.5K) Release current (0.4A) Attack time resistor (25K) Release current (0.2A) Attack time resistor (50K) Release current (0.1A) Attack time resistor (100K) Release current (0.05A) Threshold1 (0.2Vrms) Threshold2 (0.14Vrms) Threshold3 (0.1Vrms) Threshold4 (0.07Vrms)
Table 9. VOLUME
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 VOLUME 1 dB STEPS 0 -1 -2 -3 -4 -5 -6 -7 8 dB STEPS 0 -8 -16 -24 -32 -40 -48 -56 OUTPUT GAIN 0dB +14dB OUTPUT ATTENUATION 0dB -10dB
0 0 0 0 1 1 1 1 1 0 1 0
VOLUME : 0 ~ -63dB
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
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3.1 ALC IN general: Table 10. VOLUME setting with ALC
Target Volume [dB] 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 : : -70 -71 -72 -73 Volume [dB] -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -14 -15 -16 -17 : : -60 -61 -62 -63 0 -10 0 0 Output Gain 0/+14dB0/-10dB [dB] +14 Output Attenuation 0/-10dB [dB] 0
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Figure 4. PIN: IN-L, IN-R Figure 7. OUT-L, OUT-R
VS 20A
VS 20A 10
50K GND Vref
D99AU1106
GND
D99AU1107
Figure 5. PIN: TREBLE-L, TREBLE-R
Figure 8. SCL, SDA
VS 20A
25K GND
D99AU1108
GND
D99AU1109
Figure 6. PIN: BASSI-L, BASSI-R
Figure 9. BASSO-L, BASSO-R
VS 20A
VS 20A
GND
45K
45K GND
D99AU1110
BASSO-L,BASSO-R
BASSI-L,BASSI-R
D99AU1111
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Figure 10. PIN: ALC Figure 12. BASS ALC: Threshold curve
VO (Vrms)
VS=1.8V; f=100Hz; Volume=-14dB; Output gain=+14dB Intern. release circuit=ON
D99AU1115
VS 20A
Bass boost without ALC Bass boost with ALC Threshold: 8dB 11dB
0.1
17dB
14dB
100K GND
D99AU1112
0.01 0.01
Bass= +14dB boost
flat
0.1
VI(Vrms)
Figure 11. PIN CREF
Figure 13. BASS ALC: THD
D99AU1114
VS 20A
THD V =1.8V; f=100Hz; S (%) Volume=-14dB; 10
Output gain=+14dB Intern. release circuit=ON Bass boost with ALC
1
14d
11d
0.1
17dB
8dB
1K
Threshold
B B
Bass boost without ALC
0.01
GND
D99AU1113
0.001 0.01 0.1
flat
VI(Vrms)
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Figure 14. board and Components Layout of the Application & Test Circuit.
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Figure 15. SO20 Mechanical Data & Package Dimensions
mm DIM. MIN. A A1 B C D (1) E e H h L k ddd 10.0 0.25 0.40 2.35 0.10 0.33 0.23 12.60 7.40 1.27 10.65 0.75 1.27 0.394 0.010 0.016 TYP. MAX. 2.65 0.30 0.51 0.32 13.00 7.60 MIN. 0.093 0.004 0.013 0.009 0.496 0.291 0.050 0.419 0.030 0.050 TYP. MAX. 0.104 0.012 0.200 0.013 0.512 0.299 inch
OUTLINE AND MECHANICAL DATA
0 (min.), 8 (max.) 0.10 0.004
(1) "D" dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs shall not exceed 0.15mm per side.
SO20
0016022 D
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Table 11. Revision History
Date January 2003 June 2004 Revision 3 3 Third issue Changed the Style-sheet in compliance to the new "Corporate Technical Pubblications Design Guide" Description of Changes
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com
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